instruction-set

I'm new in x86. My question is about function calls. As far as i know there is three function call types: short call (0xe8), far call (0x9a) and near call (0x??). Some call short call a relative call (ip += arg / cs = inv) and far call an absolute call (ip = arg / cs = arg), but what about near call (ip = ? / cs = ?). Some say that calling function far (9a) is almost certainly wrong on 32-bit systems. Why? Doesn't x86 mean 32-bit system? Is far call's argument a flat address (the one we use in c++ or other languages) or cs:ip notated and how do i convert a plain address into cs:ip form? Is

Does the GeForce 6xx Series GPUS use RISC, CISC or VLIW style instructions? In one source, at http://www.motherboardpoint.com/risc-cisc-t241234.html someone said "GPUs are probably closer to VLIW than to RISC or CISC" . In another source, at http://en.wikipedia.org/wiki/Very_long_instruction_word#implementations it says "both Nvidia and AMD have since moved to RISC architectures in order to improve performance on non-graphics workload" AFAIK, Nvidia does not publicly document it's hardware instruction sets. The best you can see officially is PTX ISA which is the instruction set of a virtual

0x004012d0 <main+0>: push %ebp 0x004012d1 <main+1>: mov %esp,%ebp 0x004012d3 <main+3>: sub $0x28,%esp If the address is not available , can we calculate it ourselves? I mean we only have this: push %ebp mov %esp,%ebp sub $0x28,%esp amount of bytes is difference of addresses between adjacent instructions: 0x004012d0 <main+0>: push %ebp ;1 byte 0x004012d1 <main+1>: mov %esp,%ebp ;2 bytes 0x004012d3 <main+3>: sub $0x28,%esp if you have only text then go here: http://www.swansontec.com/sintel.html and here: http://faydoc.tripod.com/cpu/conventions.htm and calculate for each instruction, prefix and

For sake of example, imagine i was building a virtual machine. I have a byte array and a while loop, how do i know how many bytes to read from the byte array for the next instruction to interpret a intel 8086 like instruction? EDIT: (commented) the cpu reads the opcode at the instruction pointer, with 8086 and CISC you have one byte and two byte instructions. How do i know if the next instruction is F or FF? EDIT: Found a ansew myself in this peice of text on http://www.swansontec.com/sintel.html The operation code, or opcode, comes after any optional prefixes. The opcode tells the processor

What exactly does this instruction do? I know that it tries to align data with a multiple of a specific number but why would you need to do this? Is there an equivalent instruction in other assemblers? You usually align data to get better performance. For most processors, memory access has some penalty when not accessing specific byte boundaries. For other assemblers, there often is some kind of pseudo-op .align for this. Most compilers also align their data structures (though you can disable it for debug purposes). Also See this Wikipedia entry . Note that non-emulated MIPS systems might even

under "The Thumb instruction set" in section 1-34 of "ARM11TechnicalRefManual" it said that: "The Thumb instruction set is a subset of the most commonly used 32-bit ARM instructions.Thumb instructions are 16 bits long,and have a corresponding 32-bit ARM instruction that has the same effect on processor model." can any one explain more about this especially second sentence and say how does processor perform it? The ARM processor has 2 instruction sets, the traditional ARM set, where the instructions are all 32-bit long, and the more condensed Thumb set, where most common instructions are 16-bit

I have the next code: mov ax,@data mov ds,ax Why I can not write just like this? mov ds,@data All source: .MODEL small .STACK 100h .DATA HelloMessage DB 'Hello, world',13,10,'$' .CODE .startup mov ax,@data mov ds,ax mov ah,9 mov dx,OFFSET HelloMessage int 21h mov ah,4ch int 21h END Thank you! You can't, because the instruction set doesn't contain an instruction to do that. It is just one of the many idiosyncrasies of the x86. These kind of restrictions are fairly normal for assembly languages. Most architectures contain some registers that are treated specially (for example the processor