computer-architecture

The Intel core i7 has per-core L1 and L2 caches, and a large shared L3 cache. I need to know what kind of an interconnect connects the multiple L2s to the single L3. I am a student, and need to write a rough behavioral model of the cache subsystem. Is it a crossbar? A single bus? a ring? The references I came across mention structural details of the caches, but none of them mention what kind of on-chip interconnect exists. Thanks, -neha Modern i7's use a ring. From Tom's Hardware : Earlier this year, I had the chance to talk to Sailesh Kottapalli, a senior principle engineer at Intel, who

Hi have some question regarding spatial and temporal locality. I have read in the course theory that spatial locality If one item is referenced, the likelihood of other address close by will be referenced soon temporal locality One item that is referenced at one point in time it tend to be referenced soon again. Ok, but how do I see that in the code? I think I understood the concept for temporal locality but I don't understand spatial locality yet. For instance in this loop for(i = 0; i < 20; i++) for(j = 0; j < 10; j++) a[i] = a[i]*j; The inner loop will call same memory address when

Suppose I'm a primarily Linux user, but I'm developing an application in Go that I want to be cross platform. I've searched around, but I can't seem to find information to absolve the following: If I go install a binary on my amd64 Ubuntu system, will it also work on anyone else's 64-bit Ubuntu/Debian system? How can I use go install to build an x86_64 binary that will also run out-of-the-box on 32-bit Debianlikes? If I must use Windows to make a binary which will run on Windows, how can I also ensure that even if my Windows system is 64-bit the executable will be built for x86_64? My

Taking Peter Norvig's advice , I am pondering on the question: How much time does it take to fetch one word from memory, with and without a cache miss? (Assume standard hardware and architecture. To simplify calculations assume 1Ghz clock) Seems like Norvig answers this himself : execute typical instruction 1/1,000,000,000 sec = 1 nanosec fetch from L1 cache memory 0.5 nanosec branch misprediction 5 nanosec fetch from L2 cache memory 7 nanosec Mutex lock/unlock 25 nanosec fetch from main memory 100 nanosec send 2K bytes over 1Gbps network 20,000 nanosec read 1MB sequentially from memory 250

Where are variables in C++ stored? Inside the RAM or the processor's cache? Variables are stored: on the stack, if they're auto -matic function-local variables on the heap, if they're allocated with new or malloc , etc. (details of what it means to say "a variable is stored in the heap" in the comments) in a per-process data area if they are global or static This is all in RAM, of course. Caching is transparent to userspace processes, though it may visibily affect performance. Compilers may optimize code to store variables in registers. This is highly compiler and code-dependent, but good

I understand what it means to access memory such that it is aligned but I don’t understand why this is necessary. For instance, why can I access a single byte from an address 0x…1 but I cannot access a half word (two bytes) from the same address. Again, I understand that if you have an address A and an object of size s that the access is aligned if A mod s = 0 . But I just don’t understand why this is important at the hardware level. Hardware is complex; this is a simplified explanation. A typical modern computer might have a 32-bit data bus. This means that any fetch that the CPU needs to do

What forms of memory address spaces have been used? Today, a large flat virtual address space is common. Historically, more complicated address spaces have been used, such as a pair of a base address and an offset, a pair of a segment number and an offset, a word address plus some index for a byte or other sub-object, and so on. From time to time, various answers and comments assert that C/C++ pointers are essentially integers. That is an incorrect model for C/C++, since the variety of address spaces is undoubtedly the cause of some of the C rules about pointer operations. For example, not