computer-architecture

Confused between Temporal and Spatial locality in real life code

ⅰ亾dé卋堺 提交于 2019-12-02 23:17:29
I was reading this question , I wanted to ask more about the code that he showed i.e for(i = 0; i < 20; i++) for(j = 0; j < 10; j++) a[i] = a[i]*j; The questions are, I understand temporal locality, I think that references to i and j should be temporal locality. Am I right? I also understand spatial locality, as the question I linked answers that references to a[i] should be spatial locality. Am I right? The person said, "The inner loop will call same memory address when accessing a[i] ten times so that's an example for temporal locality I guess. But is there spatial locality also in the above

Difference between ISR and Function Call?

守給你的承諾、 提交于 2019-12-02 21:10:47
I want to understand difference between ISR (Interrupt Service Routine) and Function call. I feel both the function call and ISR are the same from the hardware perspective. Please Correct me if I am wrong. All I could found about ISR and Function call is as follows: ISR: Asynchronous event that can occur any time during the execution of the program Saves the PC, Flags and registers on the stack and disables all the interrupts and loads the address of the ISR ISR cannot have arguments that can be passed to it Cannot return values Enables the interrupts Generally small as they are taking the

Seeing how Instructions get Translated (Computer Architecture)

帅比萌擦擦* 提交于 2019-12-02 18:28:34
Little bit of a confusing question. But Im really looking for learning some low level programming. Thing is, Dev boards like Arduino/Etc. really hide alot of whats going on. I have spent some time learning about Computer Architecture, Logic/Gates/Sequential Logic/etc.. (I went even as far as to learn the Physics of Semiconductors and Electronics related to it all, just to know what exactly is going on, as well as how Gates are made using CMOS Transistors and such). But thats about where it ends....and I want to be able to understand how an Instruction (Like Hex/or Assembly/etc.. code) is

The relation between privileged instructions, traps and system calls

核能气质少年 提交于 2019-12-02 16:00:23
I am trying to understand how a virtual machine monitor (VMM) virtualizes the CPU. My understanding right now is that the CPU issues a protection fault interrupt when a privileged instruction is about to be executed while the CPU is in user mode. In high level languages like C, privileged instructions are wrapped inside system calls. For example, when an application needs the current date and time (instructions that interact with I/O devices are privileged), it calls a certain library function. The assembled version of this library function contains an instruction called 'int' that causes a

What does stripping off the ASCII template mean?

浪尽此生 提交于 2019-12-02 07:03:25
问题 I am working on a practice exam problem The Problem On execution of this program, the user inputs two numbers. What is the value of xGuess so we can strip off the ASCII template? Explain. .ORIG x3000 TRAP x23 LD R2, ASCII ADD R1, R2, R0 TRAP x23 ADD R0, R0, R2 ADD R0, R0, R1 ASCII .FILL xGuess .END Using Lc3 Assembly as a reference, I was able to work out what this program does(from top to bottom) Start placing code at memory address x3000 Lets user input a character, call this character.

What does stripping off the ASCII template mean?

亡梦爱人 提交于 2019-12-02 04:36:59
I am working on a practice exam problem The Problem On execution of this program, the user inputs two numbers. What is the value of xGuess so we can strip off the ASCII template? Explain. .ORIG x3000 TRAP x23 LD R2, ASCII ADD R1, R2, R0 TRAP x23 ADD R0, R0, R2 ADD R0, R0, R1 ASCII .FILL xGuess .END Using Lc3 Assembly as a reference, I was able to work out what this program does(from top to bottom) Start placing code at memory address x3000 Lets user input a character, call this character. Register 0 will store the value of k xGuess -> R2 (k + xGuess) -> R1. Lets user input another character,

System Control Registers in ARM Cortex-A7

徘徊边缘 提交于 2019-12-02 04:21:39
When MCR or MRC instructions execute with different cRm or opt2 , then what is the status of cRn register? For example if run: asm volatile("mcr p15, 0, %0, c9, c13, 0" : : "r"(val)) or asm volatile("mcr p15, 0, %0, c9, c13, 2" : : "r"(val)) then, which register's value will be changed c9 or c13 ? and what is the role of last option(0 or 2)?. here The MCR and MRC instructions are generic coprocessor instructions. What these instructions do depends on the particular hardware you're using, what coprocessors it has, and the values of the opcode and coprocessor register operands ( opcode1 ,

Why do Computers use Hex Number System at assembly language?

冷暖自知 提交于 2019-12-01 14:48:07
Why do computer use Hex Number System at assembly language? Why don't they use any other number system like binary, octal, decimal? What thing forced computer designer to use hex system at assembly? Why it looked so beneficial to them? Well it doesn't make a difference how you represent them but as we know that humans don't understand binary numbers, they are only to make the computer's life easier as it works on only two states true and false. So in order to make binary numbers(instructions) human readable we adapted the hexadecimal number system for representing assembly instructions. It has

Understanding Direct Mapped Cache

混江龙づ霸主 提交于 2019-12-01 12:29:53
I'm trying to understand direct mapped cache, but it is a very complex concept. I have written what I think I understand so far, but I am unsure whether I am correct or not. Can somebody please verify if the explanation below is correct? E.g, for a made up computer, just for the sake of this question, there 1024 memory locations (cells) in the RAM. This equals 2^10 so the address for each of these memory locations must be 10 bits long. The CPU is asked to get data from the RAM memory address 1100100111 . However the CPU doesn't access the data directly from this memory address in the RAM. The

Understanding Direct Mapped Cache

梦想与她 提交于 2019-12-01 09:44:35
问题 I'm trying to understand direct mapped cache, but it is a very complex concept. I have written what I think I understand so far, but I am unsure whether I am correct or not. Can somebody please verify if the explanation below is correct? E.g, for a made up computer, just for the sake of this question, there 1024 memory locations (cells) in the RAM. This equals 2^10 so the address for each of these memory locations must be 10 bits long. The CPU is asked to get data from the RAM memory address