IC软件分类

你说的曾经没有我的故事 提交于 2019-11-28 02:37:00
http://bbs.fudan.edu.cn/bbs/tcon?bid=142&f=40

1 Functional verification
      Cadence
         NC-Verilog
         NC-VHDL
         Verilog XL
     Synopsys
         VCS
         VERA Developers Kit
         LEDA Checker
         Scirocco Simulator
         Aldec
         Active HDL
2 Synthesis
     Cadence
         Ambit logic synthesis
     Synopsys
         DC Ultra
         HDL Compiler Verilog
         VHDL Compiler
         Design Ware
3 Design Planning & APR
     Cadence
         Silicon Ensemble-Ultra
         DSM Place-and-Route & Physical design planner
         Clock tree generation option
   Synopsys
         Apollo-VDSM Place & Route
         Apollo, Advanced Clock Management
         Apollo, Adv Timing Driven Op.
4 Mixed Signal & Analog Verification
     Cadence
         Artist Analog Simulation Enviroment
     Synopsys
         ST-Hspice
         NanoSim
         STAR-SIM
5 Layout & Schematic Edit
     Cadence
         Schematic composer
         Virtuoso Layout Editor
     Synopsys
         Cosmos SE Full Custom Simulation Enviroment
         Cosmos LE
6 Timing and Signal Integrity
     Synopsys
         Prime Time
7 RC-Extraction
     Synopsys
         St-RCXT (St-RCB Plus XT Op.)
8 Design for test
     Synopsys
         DFT Compiler
         TetraMAX ATPG
     Mentor
         DFT Advisor
         DFT Insight
         Fast scan ATPG
9 Physical Verification
     Mentor
         Calibre DRC-H
         Calibre LVS
         Calibre LVS-H
         Calibre RVE/QDB-h
     Cadence
         Diva verification
         Dracula Verification
     Synopsys
         Hercules Bundle (DRC/LVS/ERC/MW)

转载于:https://www.cnblogs.com/asic/archive/2011/05/22/2053481.html

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