Verilog:Procedural Continuous Assignment to register is not supported

问题

    input [31:0] write_data;
    input [4:0]  write_reg;
    reg [31:0] registers [31:0];

always @(*) 
     assign registers[write_reg] = write_data;

I have a 32-bit input write_data , which i want to an assign corresponding index which i get from write reg.Error says you cant do continuous assignment which i think causes by always@(*) but if i remove that

It says object "registers" on left-hand side of assignment must have a net type and its another error.

回答1:

assign inside an always block is the procedural assignment. It is not synthesizable and should not be used. It is there for very special modeling cases.

continuous assignment, or assign outside the always block is there for connecting nets and used all over the places. lhs of such an assignment must be a net type, i.e. wire. it cannot be a reg.

On the other hand all lhs in always blocks must be of 'reg' type.

what you had to do in your case was to remove the keyword assign:

input [31:0] write_data;
input [4:0]  write_reg;
reg [31:0] registers [31:0];

always @(*) 
     registers[write_reg] = write_data;

回答2:

You need to synchronously assign to registers. Because the synthesizer parses it and routes to a physical register (i.e. flip-flop)

always @(posedge clk) 
    my_reg = my_data;

来源：https://stackoverflow.com/questions/47345399/verilogprocedural-continuous-assignment-to-register-is-not-supported