问题
module hi (
input wire clk,
output wire [6:0] a
);
wire [7:0] b;
assign b= 8'd24;
assign a[6:0] = b[7:1];
initial $display ("%d", a);
endmodule
I get a high impedance 'z' output. Where am i going wrong?
回答1:
You didn't give the assign
statement a chance to propagate the values on the wires. The initial
block executes first. Add a delay before the $display
, or use $strobe
instead.
来源:https://stackoverflow.com/questions/40035070/display-shows-unexpected-high-impedance-z-output