嵌入式系统：RISC V专题

3 月，跳不动了？>>>

RISC-V

https://riscv.org/

RISC-V: The Free and Open RISC Instruction Set Architecture.

RISC-V is a free and open ISA enabling a new era of processor innovation through open standard collaboration. Born in academia and research, RISC-V ISA delivers a new level of free, extensible software and hardware freedom on architecture, paving the way for the next 50 years of computing design and innovation.

来源：oschina

链接：https://my.oschina.net/u/2341333/blog/3207713