Multiplication, multiply register verilog

孤街醉人 提交于 2020-01-16 19:21:09

问题


is there a way to multiply a register/ wire with a value?

e.g.

... input wire [13:0] setpoint ...
 if (timer>(setpoint*0.95)) 

回答1:


Yes this is possible, but multipliers can be quite large so use with caution. In this case the multiplicand is fixed so it will reduce the logic down quite a lot.

In RTL a real (as in 0.95) does not have much meaning you need to multiply by a fixed point number, which will also limit the precision which you can represent 0.95.

Allowing 10 binary places, a scaling of 2^10. 0.1111001100 => 0.94921875. For the comparison you need to keep track of how the result of the multiply grows.

a_int_bits.a_frac_bits * b_int_bits.b_frac_bits =
  (a_int_bits + b_int_bits) . (a_frac_bits + b_frac_bits)

Therefore the timer in the comparison would need to be LSB padded for the fractional bits that are added to the representation of 0.95.



来源:https://stackoverflow.com/questions/20592282/multiplication-multiply-register-verilog

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