问题
Is there any documentation on this? I'm trying to get a handle on the feasibility of writing a compiler for the Tilera architecture.
回答1:
The source code of their gcc compiler at www.tilera.com/scm includes gcc-style machine description (.md) files that define the instructions and other micro-architectural details needed by a compiler writer.
回答2:
Rephrasing this answer, for clarity.
Many references on the web claim they're supposedly MIPS derivates; on the other hand, neither has MIPS' own licensee/partner list any mention of Tilera, nor does Tilera itself mention MIPS in any of their product documentation. Were there some sort of (cross-)licensing agreement, this avoidance would be hard to understand.
When you look into the Linux kernel which supports both MIPS and Tile (32bit only as of this writing) architectures, the differences in assembly language are significant, see for example the kernel start entry points for MIPS and Tile architectures. The Tilera assembly mnemonics to me personally look closer to PowerPC than to MIPS.
Tilera themselves make a GCC / binutils port available at http://www.tilera.com/scm/ which includes the sourcecode tarballs; the architecture there is called tile-unknown-linux.
From this, it rather looks like they've come up with something different.
回答3:
They appear to have their own RISC-style instruction set. Many RISCs are pretty similar so new ISAs tend to look like a blend of MIPS, PPC, and ARM as chip designers adopt their favorite elements of each.
来源：https://stackoverflow.com/questions/6515358/what-instruction-set-is-used-by-tilera-microprocessors