问题
So I want to comment variable definitions in Makefile in-line. The problem is that Make doesn't strip white spaces between the definition and its comment. Here is an example of what I mean:
OPTS += -DBLA # Does bla
OPTS += -DBLUBB # Does blubb
OPTS += -DEND
.PHONY test
test:
@echo $(OPTS)
The output of this is
-DBLA -DBLUBB -DEND
with annoying extra white spaces between the options. What I want is this:
-DBLA -DBLUBB -DEND
How do I get around this Problem? The Make string function @echo $(strip $(OPTS)) would only strip whitespaces after -DEND or before -DBLA, not inbetween. My dirty hack so far is @echo $(shell $(OPTS)), which strips the unwanted spaces but uses a shell call to do so, that probably will introduce other problems, i.e. unwanted shell injection via the $(OPTS) variable. Is there a better way to do it? Simple @echo ($subst ...) doesn't work on mixed whitespaces unless one replaces all of them an then reinserts at the -.
回答1:
OPTS += -DBLA# Does bla
OPTS += -DBLUBB# Does blubb
OPTS += -DEND
Canonical make? Not a fan of alignment though.
OPTS += -DBLA# Does bla
OPTS += -DBLUBB# Does blubb
OPTS += -DEND
Looks better to my eyes.
Assuming it makes your eyes bleed,
$(strip) does in fact do what you want.
OPTS := $(strip ${OPTS})
A simple $(error [${OPTS}]) will prove it.
回答2:
Of course, 'zZz' could be replaced with any "impossible" match...
来源:https://stackoverflow.com/questions/31586713/how-do-i-properly-comment-a-variable-definition-in-gnu-make