问题
VAX CPUs has a updateable microcode feature. User can reupload microcode to VAX machine and then CPU will behave as not VAX CPU, but e.g. as PDP11 CPU.
What CPUs can be simulated with VAX microcode? Can it run machine code from a 6502, 8080, 8086?
My question is not about software simulators (like SIMH or qemu; there was an Alpha software simulator, speeded up by some microcode update), but about hardware microcode; both about theoretical possibility of making such microcode and practical microcode versions.
回答1:
I believe RAM-based changeable VAX microcode storage area ("WCS", writeable control store) did not allow enough space for a whole new instruction set to be defined.
At best it would allow a few new instructions to be added or for a bug fix for a problematic instruction - a la today's microcode updates for X86 CPUs.
For a complete instruction set it would likely require new microcode ROM/PLA devices and that could well require special gate arrays, esp for the later VAX 8xxx CPUs.
Since (besides desktop VAXen which were later MIPS RISC boxes) these were expensive 'big iron' machines used in an IT context - I don't see them ever having been used in such a 'dreamer' context at this ultralow level. Certainly there would not be useful warranty ability on reliability of computation as the device was sold "as a VAX", and not a "general purpose CPU emulator".
来源：https://stackoverflow.com/questions/6390036/vax-what-cpus-can-vax-simulate-with-microcode