Why we cant compare (bne-beq) a register with an immediate (Assembly-MIPS)?

孤街浪徒 提交于 2019-12-22 17:38:35

问题


For example on add we have addi for adding a register and an immediate,why on this case we cant have bnei or beqi...

Im supposed to answer on that,but im not sure...any help?


回答1:


The reason is the instruction encoding:

Both ADDI and BNE/BEQ are I-Type instructions. But whereas the immediate field in the ADDI instruction is used for storing the immediate operand for the addition, it's used for storing the branch offset in the case of BEQ/BNE.

There may be MIPS assemblers which allow you to use immediate operands in conditional branch instructions, but they will expand those pseudo-instructions into multiple actual instructions.




回答2:


In architectures with flags, the branch instructions usually follow a compare instruction which can compare registers and immediates and set the appropriate flags (often called CMP, but often other instructions can set flags, too). The branch then only checks the flags.

(This was posted before the question was clarified to MIPS, which doesn't use flags)




回答3:


You don't want to use the 16 bit immediate value as an address to jump to because that limits where you can jump. MIPS has 32 bits for an address. If you only use 16 bits, you are using a very small fraction of the possible addresses.



来源:https://stackoverflow.com/questions/16760255/why-we-cant-compare-bne-beq-a-register-with-an-immediate-assembly-mips

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