Why “DIV EDX” in MASM always generates processor exception?

吃可爱长大的小学妹 提交于 2019-12-19 20:47:39

问题


I've got that question on my Computer Architecture Exam on Informatics last semester : "Why 'DIV EDX' in MASM always generates processor exception?"
What is the mechanism which generates exception?


回答1:


When you do 1-operand division on x86 CPUs, EDX:EAX (64 bit) is divided by the 1st operand (32 bit). The result is stored in EAX (32 bit).

So when you divide by EDX:EAX by EDX, what you essentially get is (EDX * 0x100000000 + EAX) / EDX, which result is always above 0x100000000 and does not fit into the target register or the divisor is zero. In both cases a divide exception occurs.

See also this page (from the Intel developer manuals).

Note that this is not specific to the assembler (MASM), but to the platform in this case.



来源:https://stackoverflow.com/questions/12231784/why-div-edx-in-masm-always-generates-processor-exception

易学教程内所有资源均来自网络或用户发布的内容,如有违反法律规定的内容欢迎反馈
该文章没有解决你所遇到的问题?点击提问,说说你的问题,让更多的人一起探讨吧!