问题
There isn't a lot of information about the L4 cache, but as far as I know, it was used in the 4th and 5th generation of Intel processors(2013-2014), but it's gone from the current generation.
Was the L4 bad, ineffective or something?
回答1:
For Haswell and Broadwell, eDRAM L4 cache tags are resident in the on-chip L3 cache. Although this setup simplifies the LLC design and allows earlier tag checking for fetches from the processor, it makes the accessing to eDRAM LLC from other devices (e.g., independent GPUs via PCIe) slower as these memory requests have to be forwarded to on-chip L3 first before being handled by the LLC. To address this, eDRAM has been moved to the position upon DRAM controllers in Skylake (more like a memory-side buffer rather than a cache)
Reference : Li, Ang, et al. "Exploring and analyzing the real impact of modern on-package memory on HPC scientific kernels." Proceedings of the International Conference for High Performance Computing, Networking, Storage and Analysis. ACM, 2017
You can see Broadwell, Haswell, and Skylake architectures below. Broadwell and Haswell
Skylake
来源：https://stackoverflow.com/questions/40864852/what-happened-to-the-l4-cache