问题
I have a problem that I just can't wrap my head around. I have a minimal example makefile that is supposed to compile a very simple .c file into an executable program.
When I run make, the compiler starts compiling and then produces an error message
"T:\printOffsets.c:10:21: error: bootIfc.h: No such file or directory"
Then I copy the exact same command line make is using to build the target and run it directly in the same Windows command shell instance, and suddenly compilation succeeds without errors!! The command line is (path names simplified):
T:\perl\c\bin\gcc.exe T:\printOffsets.c -IT:\include\ -o D:\printOffsets.exe
How do I know? Well, make prints the command line before it executes it, so I simply copy&paste from the shell.
I don't get it! How is this possible?? How can the exact same command work on the shell and fail if launched from within a Makefile??
I'm using GNU Make 3.82 on Windows 7, by the way.
回答1:
When command in makefile is giving different result from shell, just make sure it is using the shell you want.
Add a phony target in your make file:
.PHONY:testshell
testshell:
echo $(SHELL)
And run:
gmake testshell
If the result is not your favorite shell you can force it by adding a line such as this one at the beginning of your makefile:
SHELL=C:\Windows\System32\cmd.exe
If you are not sure of full path of your shell, just open a DOS console and launch:
where cmd
Edit: alternative solution
When using sh shell instead of cmd shell, you can also replaces all backslashes in commands with slashes and keep using sh.
Edit 2: change shell for a single target
来源：https://stackoverflow.com/questions/36403389/exact-same-command-line-produces-error-in-make-yet-succeeds-if-run-from-shell