GNU Makefile first target not getting invoked

问题

I am following the solution in GNU Makefile treating each recipe line as sub-shell command without continuation character

target_compile: PROJECT_SIM_OPTS += -LDFLAGS -L${CURRENT_DIR},-lm -load

target_compile: copy_shared_object actual_compile_with_sim_opts
    @echo PROJECT_SIM_OPTS=${PROJECT_SIM_OPTS} ...

When I make the Makefile, I am able to see the second target_compile fire off but not the first target_compile which has no dependencies and recipe except a variable. I tried adding override before PROJECT_SIM_OPTS and ; at the end of the line but still it is not working.

There is no Error message reported which makes it even harder to detect. In nutshell, I have to embed this piece of code in another Makefile and if the first target would work, I will see a file generated with -LDFLAGS -L${CURRENT_DIR},-lm -load in it. Since this file is being generated without these flags, I am confident to say that first target is not firing.

How can the two target_compile work together?

回答1:

It turned out to be an ordering issue. In my case

target_compile: copy_shared_object actual_compile_with_sim_opts
    @echo PROJECT_SIM_OPTS=${PROJECT_SIM_OPTS} ...

actual_compile_with_sim_opts was running before copy_shared_object

Once I put the dependency like this, actual_compile_with_sim_opts: copy_shared_object

I was able to get both targets to work with proper flags

Thanks @Beta for all the help.

来源：https://stackoverflow.com/questions/49640050/gnu-makefile-first-target-not-getting-invoked