Overriding a makefile variable

偶尔善良 提交于 2019-12-10 22:29:24

问题


I have a master makefile which has the default values for variables and then a child makefile which includes project specific settings. At the end of the child makefile, I include the master makefile.

I have been using the following code in the master makefile to set default values for a variable

ifndef CC
    CC = avr-gcc
endif

And then recently I read that I can also do

CC ?= avr-gcc

So my question is, whether both are same and if yes which one is the recommended way of overriding variables.


回答1:


The second is broadly understood, easier to read and causes less clutter.

The first way, using ifndef / endif is more for instances where you want to do more than just set a variable, like toggling many things depending on if DEBUG is set, or something else.

If you just want to set a variable if it's not already set, then var ?= value is definitely sufficient.



来源:https://stackoverflow.com/questions/18869628/overriding-a-makefile-variable

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