Can pretty variable names be used for registers in GCC inline assembly?

问题

I have some inline assembly. I want GCC to have total freedom in choosing GP registers to allocate. I also want to use pretty names for registers inside the assembly for ease of comprehension for future maintainers. I think I did this previously (10+ years ago) for ARM 5te but am now scratching my head while writing some AArch64 code.

In a simpler example, this is what I want:

uint32_t arg1 = 1, arg2 = 2, result;

asm volatile(
  "add  %result, %arg1, %arg2\n"
  // Outputs:
  : ???
  // Inputs:
  : ???
  // Clobbered:
  : ???
);

I figure I need the right voodoo to go where I have written "???" above.

Is it possible?

回答1:

Yes.

[arg1] "r" (arg1)

For example. The two names([arg1] and (arg1) above) can be different.

Inside the assembly code, you'd use:

add %[result], %[arg1], %[arg2]

Documentation link.

Here's your whole example reworked (case changed for the assembly variables just to illustrate that they needn't be the same):

uint32_t arg1 = 1, arg2 = 2, result;

asm volatile(
  "add  %[RESULT], %[ARG1], %[ARG2]\n"
  : [RESULT]"=r"(result)             /* output */
  : [ARG1]"r"(arg1), [ARG2]"r"(arg2) /* inputs */
  :                                  /* no clobbers */
);

来源：https://stackoverflow.com/questions/28325569/can-pretty-variable-names-be-used-for-registers-in-gcc-inline-assembly