arm-linux-gnueabi compiler options

I am using, arm-linux-gnueabi-gcc to compile C programs for ARM processor in Linux. However, I am not sure what is the default ARM mode for which it compiles.

For example, for the C code:

test.c

unsigned int main()
{
    return 0x1ffff;
}

arm-linux-gnueabi-gcc -o test test.c

now, when I look at the disassembly of main() function with objdump, I can see:

arm-linux-gnueabi-objdump -d test

<main>:

    push    {r7}
    add r7, sp, #0
    movw    r3, #65535  ; 0xffff
    movt    r3, #1
    mov r0, r3
    mov sp, r7
    pop {r7}
    bx  lr

it appears that this is disassembly for Thumb mode of ARM (because of the push instruction).

How can I display the disassembly as follows:

      .sect ".text"
      .global _fn
_fn:  MOVW A1,#65535
      MOVT A1,#1

      BX LR

or this

      .sect ".text"
      .global _fn
_fn:  LDR A1, CON1
      BX LR

      .sect ".text"
      .align 4
CON1: .word 0x1ffff

I saw this example here:

http://e2e.ti.com/support/development_tools/compiler/f/343/t/40580.aspx

however, I am unable to view the disassembly the way it is displayed there.

Thanks.

push doesn't necessarily tell you it is in thumb mode, in fact ARM's new assembly syntax called unified assembly language which means in most of the cases you can compile same code to arm or thumb-2 instruction sets.

Other problem is that, you are compiling in -O0 mode which adds some extra instructions for easy of debugability. Try -O2 and you should get the instruction flow you want.

gcc with -v switch as in arm-linux-gnueabi-gcc -v should show you how it is built, which also tells you the overall default options it uses when compiling your source code.

One last thing, targeted assembly sequence you mentioned uses ATPCS register naming scheme (check objdump doc for information), it uses a1 instead of r0 for example. You can also get this by setting disassembler-options in objdump with -M switch. Like below;

$ arm-linux-gnueabihf-gcc -c -O2 -o test test.c
$ arm-linux-gnueabihf-objdump -M reg-names-special-atpcs -d test

test:     file format elf32-littlearm


Disassembly of section .text.startup:

00000000 <main>:
   0:   f64f 70ff   movw    a1, #65535  ; 0xffff
   4:   f2c0 0001   movt    a1, #1
   8:   4770        bx  LR
   a:   bf00        nop

Another option is to get assembly output from gcc itself by using -S switch. Like below;