Question about setg and comparison in Assembly

你说的曾经没有我的故事 提交于 2019-12-02 09:27:23

Note you have two left shifts and one right, so that's not 3 left in total. Also you are using 64 bit registers so the value in rbx before the setg is actually 0x7ffffffffffffffe. The instruction set reference entry for setg says result is 1 if ZF=0 and SF=OF. Well, the result of the addition is 0x7ffffffffffffffd and that is not 0 so ZF is 0. SF being the sign bit is zero, and OF being signed overflow is zero too. Hence the condition holds, so bl will be 1 but the rest of rbx is unchanged giving you 0x7fffffffffffff01.

Adding RBX to RAX calculates RBX - 1, because RAX still = -1.

I think TMax - 1 means INT64_MAX - 1.

Two left shifts and one right gives you a number with the high bit cleared (non-negative) and the low bit cleared. The max positive (2's complement) integer is all bits set except the sign bit, and this is one less than that.

Jester explained how setg works based on EFLAGS set by add. Look up setcc in the manual.

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