Calculating delay from 3 nested loops

Question

My exercise: •Calculate the maximum delay possible using three loops @ 1 MHz clock frequency. (Answer 49.94 s)

delay:   ldi    r23,$FF          ;Initialise 3rd loop counter 
loop3:   ldi    r24,$FF          ;Initialise 2nd loop counter 
loop2:   ldi    r25,$FF          ;Initialise 1st loop counter 
loop1:   dec         r25              ;Decrement the 1st loop counter 
          brne   loop1            ;and continue to decrement until 1st loop counter = 0 
          dec    r24               ;Decrement the 2nd loop counter 
          brne   loop2            ;If the 2nd loop counter is not equal to zero repeat the 1st loop, else continue 
          dec    r23
          brne   loop3 
      ret                   ;Return

I'm trying to calculate the maximum delay using those 3 loops the answer apparently is 49.94 s and I'm really struggling it was much simpler with 2 nested loops.

Here is what I've tried, but the answer is way off.

33*((255*3)-1) + 17*((33*3)-1) + 11*3

ldi - 1 clock cycle, brne 1 or 2 clock cycles

Architecture: ATmega8535

Answer 1

For starters, the longest loop would load 0 not FF to the counter, but let's stick with FF so we get the expected answer. With FF the loop runs 254 times and exits on the 255th.

The general formula is 1 for ldi, (n-1) * (body + 3) for the full iterations (1 for dec and 2 for brne) and (body + 2) for the final one (1 fordec and 1 for not taken brne). body means whatever is in the loop body, for the innermost loop that's 0 as it's empty.

Thus, for the innermost loop: 1 + 254 * (0 + 3) + (0 + 2) = 765. For the middle loop, the body is the 765 from the innermost loop, thus we have: 1 + 254 * (765 + 3) + (765 + 2) = 195840. For the outermost loop the body is the 195840 from the middle loop, thus we have: 1 + 254 * (195840 + 3) + (195840 + 2) = 49939965 which is the expected answer.