Calling flex from a makefile

Question

I would like to call flex to build a .l file, then call gcc to build everything.

I tryed:

comp:
    lex scanner.l   \\
    gcc -o a.out main.c hash.c -I.         


        

Answer 1

IIRC the usual Makefle pattern is

a.out: lex.yy.c main.c hash,c
<tab> gcc -o a.out main.c hash.c lex.yy.c -I. -ll

lex.yy.c: scanner.l
<tab> lex scanner.l

This is wrong, because in the original code, main.c includes lex.yy.c

This assumes the original code is changed so that main.c does not include lex.yy.c

Without that change, this will fail because there will be two definitions of yylex(), one from its #include in main.c, and one because it is supplied as a source code compilation unit. I encourage folks to not include a .c file into another .c file.

In general, the convention is to use a different file extension (.i) for included source files which generate unique symbols and code.

Answer 2

Remove the backslash, or add a semicolon (;) before it.
As it is now, the two commands are added together on one line, and executed as one long command.

Answer 3

all: a.out

lex.yy.c: scanner.l
    lex scanner.l

a.out: lex.yy.c main.c hash.c
    gcc -o a.out main.c hash.c -I.  

Answer 4

Try this:

lex.yy.c: scanner.l
    lex scanner.l

comp: main.c hash.c
    gcc -o a.out main.c hash.c -I.

main.c: lex.yy.c

The first rule set tells make that lex.yy.c needs to be rebuilt any time scanner.l changes and provides the command to recreate lex.yy.c. The second rule set tells make that the fake target comp depends on main.c and hash.c. If either file changes, then invoking make comp will cause a recompile. The last line is a stand-alone dependency that tells make to consider main.c as dirty any time that lex.yy.c changes. It will also force an invocation of make comp to create lex.yy.c if it does not exist.