Can someone explain the power control register in exynos ARM?

Question

In the Linux kernel, more accurately /arch/arm/mach-exynos/cpuidle.c on 3.9-rc6, the lines reads

static unsigned int g_pwr_ctrl, g_diag_reg;

static void save_c         


        

Answer 1

Your question does lack focus, please consider updating it. I will assume that you are trying to understand the exynos suspend/resume mechanism in the Linux kernel.

Why Inline assembler

... this appears to be gcc inline assembly. Considering it's a critical component, the asm is reading this as it's either
a) faster, and therefore more efficient;
b) not available in C

We choose option b, there is no way to express mcr/mrc in C.

Inline clobber list

Secondly, ... : : "cc");

This is a gcc clobber list. It says that the condition codes will be altered by the instruction. This maybe just to ensure that gcc decides not to discard this instruction. You can read more in the gcc manual.

What is this doing

I'm having trouble understanding why this is needed at-all, this can be accessed on the fly, in a function.

The portion you need to look at is exynos4_enter_core0_aftr(). This uses both save_cpu_arch_register() and restore_cpu_arch_register(). So, there is a dual set of functions and we note that the values are stored in globals. The other thing to note is the cpu_suspend(0, idle_finisher);. This function tells Linux the cpu is suspended and then calls cpu_do_idle(); which is usually an ARM WFI (wait for interrupt) instruction. This makes the CPU freeze at that instruction until an enabled interrupt triggers. The issue with suspending a CPU clock at full speed, is this can waste some current/power. Typically, SDRAM and platform clocks maybe automatically put to in low power states in this mode.

You will have to consult the data sheets on your CPU/SOC for more. However, back to the question. It is most likely that this low power mode destroys/alters these co-processor registers, so save_cpu_arch_register() and restore_cpu_arch_register() are needed to ensure they remain as they were before the call. The code could probably use locals in exynos4_enter_core0_aftr(). They do need to be saved and restored or the CPU may resume with weird power/voltage/clocks. It could also be that cpu_do_idle() is over-ridden for your machine and it is altering these registers.

So briefly, this function is to save some state that will be destroyed when the CPU goes to suspend or wait for interrupt mode.