Included Makefile's parent directory

Question

I want to describe each submake\'s dependencies in a file that a top-level Makefile can include. This is to allows for a recursive make setup (with all of the

Answer 1

As the snippet of documentation included in the answer on your linked ticket indicates. The value of MAKEFILE_LIST is updated as make goes. The latest entry in the list is the current makefile which makes the penultimate entry in the list the most recently included makefile before that. If you are willing to assert that the main project/Makefile.reg will only ever be included from a sub-directory makefile then it could simply examine that entry in MAKEFILE_LIST.

Alternatively you could simply define a canned recipe in the main Makefile and call it in each project makefile to define the appropriate targets.

Unfortunately make does make getting the penultimate entry a little more difficult than is pleasant. But the following should work:

FOO=a b c d e f g
BAR=h i j k l m n
BAZ=o p q r s t u
QUX=v w x y z 1 2

penultimateword = $(wordlist $(words $1),$(words $1), x $1)

REG=FOO
$(REG)_DIR= $(call penultimateword,$($(REG)))
$(info REG_DIR=$($(REG)_DIR))

REG=BAR
$(REG)_DIR= $(call penultimateword,$($(REG)))
$(info REG_DIR=$($(REG)_DIR))

REG=BAZ
$(REG)_DIR= $(call penultimateword,$($(REG)))
$(info REG_DIR=$($(REG)_DIR))

REG=QUX
$(REG)_DIR= $(call penultimateword,$($(REG)))
$(info REG_DIR=$($(REG)_DIR))

all: ;

Inspiration for the above came from the chop function from the fantastic GMSL.