Page table entry (PTE) descriptor in Linux kernel for ARM

Question

I have read article of Duartes from: http://duartes.org/gustavo/blog/post/how-the-kernel-manages-your-memory

In part that describes about PTE content, bit [0:11] is

Answer 1

The ARM Linux code is different depending on the type of ARM and other conditionals. pgtable.h, page.h and mostly pgtable-2level.h give some details. There are two versions of PTE values; one for Linux and one for hardware.

Answer 2

As each architecture implement their MMU (memory management unit) differently, the PTE descriptor is architecture dependent.

If we look at Linux, it has a three level page table structure (inherited from the x86 architecture), which in most ARM platforms is wrapped to fit a two level page table structure (newer ARM have support for 3 levels). Linux also uses "dirty" and "accessed" bit that is available in the x86 architecture for the memory management logic of the kernel. These bits are not available in the ARM architecture, which ARM Linux has solved by emulating it in software. This is done by having two versions of the PTE page tables. One for the OS which contains these missing "bits", and one for the actual HW to use.

In the end, the Linux OS for different architectures behave the same. It's all about how the OS are using the hardware mechanisms that the specific architecture is offering as there are pro and cons for each.