How do GNU assembler x86 instruction suffixes like “.s” in “mov.s” work?

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执笔经年
执笔经年 2020-12-07 02:33

GNU assembler appears to have some means of controlling the alternative forms of the opcode being emitted for some instructions. E.g.

.intel_syntax noprefix
         


        
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  • 2020-12-07 03:16

    As of Binutils 2.29 the instruction suffixes are now deprecated in favor of pseudo-prefixes. You can find the older suffixes documented in the GNU Assembler (pre-2.29) info pages. Earlier info as pages say this:

    9.15.4.1 Instruction Naming

    [snip]

    Different encoding options can be specified via optional mnemonic suffix. .s suffix swaps 2 register operands in encoding when moving from one register to another. .d8 or .d32 suffix prefers 8bit or 32bit displacement in encoding.

    Documenting the new pseudo prefixes, Binutils 2.29 (and later) info as pages were revised to read:

    Different encoding options can be specified via pseudo prefixes:

    • {disp8} – prefer 8-bit displacement.
    • {disp32} – prefer 32-bit displacement.
    • {load} – prefer load-form instruction.
    • {store} – prefer store-form instruction.
    • {vex2} – prefer 2-byte VEX prefix for VEX instruction.
    • {vex3} – prefer 3-byte VEX prefix for VEX instruction.
    • {evex} – encode with EVEX prefix.
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