GNU Make pattern to build output in different directory than src

Question

I\'m trying to create a Makefile which places my .o files in a different directory than my source files. I\'m trying to use a pattern rule so I don\'t have to c

Answer 1

Instead of building objects in another directory, you could try building objects from sources in another directory: put your makefile in the directory where the objects are going to be and tell make to look for sources elsewhere using VPATH. This works best if all object files are supposed to end up in the same directory.

Answer 2

After re-reading the documentation on static pattern rules, I derived the following pattern rule which seems to work.

$(OBJ_DEBUG): $(OBJDIR_DEBUG)/%.o: %.cpp
    $(CXX) $(CFLAGS_DEBUG) $(INC_DEBUG) -c $< -o $@

I'm not sure this is the best approach, and I'm open to suggestions.

Answer 3

Makefile that "duplicates" source tree in separate build directory by running GCC on each source - https://stackoverflow.com/a/41924169/4224163