Little-endian and Big-endian

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你的背包 2021-01-27 17:43

I must write a routine for conversion between the 2 representations. But I\'m a bit confused. If I have an architecture with a memory with words of 32 bits and I must store the

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  •  醉酒成梦
    2021-01-27 18:05

    There are various ways that processors implement big-endian and little-endian — for a detailed discussion, consult the Wikipedia article on Endianness.

    For a 2-byte quantity, there are just two options:

    Value:           0x1234 (MSB = 0x12, LSB = 0x34)
    Little-endian:   LSB then MSB    0x34  0x12  — Intel, …
    Big-endian:      MSB then LSB    0x12  0x34  — SPARC, PowerPC, …
    

    For a 4-byte quantity, there are more options, but there are still two primary ones (plus a historical curiosity):

    Value:           0x12345678 (MSB = 0x12, NMSB = 0x34, NLSB = 0x56, LSB = 0x78)
    Little-endian:   LSB, NLSB, NMSB, MSB    0x78  0x56  0x34  0x12
    Big-endian:      MSB, NMSB, NLSB, LSB    0x12  0x34  0x56  0x78
    PDP-11:          NMSB, MSB, NLSB, LSB    0x34  0x12  0x78  0x56
    

    Note that a number of modern chip sets are bi-endian — can be switched to run in big-endian or little-endian mode:

    Some architectures (including ARM versions 3 and above, PowerPC, Alpha, SPARC V9, MIPS, PA-RISC, SuperH SH-4 and IA-64) feature a setting which allows for switchable endianness in data segments, code segments or both.

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