Makefile: multiple definition and undefined reference error

Question

Im currently learning how to code without an IDE and so Im learning how to write makefiles. Here is my current test-project:

\\__ /CoDstructor/
      |\\__ Makef         


        

Answer 1

From memory, did not check the docs, problem is this:

$(OBJS): $(SOURCES)
    @mkdir -p $(@D)
    $(CXX) -MMD -MP $(CXXFLAGS) -c $< -o $@

That means that every object file depends on all sources. And then the compile command uses $< which I think means the first dependency. So in effect, you compile both types.o and main.o from main.cpp (which is first of the $(SOURCES), I suppose).

---

One solution would be to use a pattern rule, something like:

 %.o : %.c
     @mkdir -p $(@D)
     $(CXX) -MMD -MP $(CXXFLAGS) -c $< -o $@

Object files are already requied by your rule $(BIN_DIR)/$(APP_NAME): $(OBJS), and this pattern rule will tell make how to generate them.