Make compiles all the files every time including the unchanged files

Question

I don\'t know why the Make recompiles all the files every time including the unchanged files, it takes a long time. I searched the Stack Overflow and found some solutions, b

Answer 1

Just to be very clear: your makefile is broken in various ways which djgandy and Norman Gray have correctly diagnosed. But the specific answer to your specific question of why files are being constantly rebuilt is this:

token.o: 
    $(dir_guard)
    $(CXX) $(CXXFLAGS) -o $(OBJ)/token.o -c $(TOKEN_CPP)

Leaving aside all the other issues, here you tell make: "if you want to build a file token.o, then you can do it with this recipe". But the recipe doesn't build token.o, it builds $(OBJ)/token.o. This is wrong, because after the recipe is run the target (token.o) still doesn't exist. So the next time you run make, it says "oh, I need to build token.o... gee, it doesn't exist so I guess I have to build it... oh, here's a rule that can build it...` which still doesn't actually build it.

Your makefile is violating the second rule of Makefiles: Every non-.PHONY rule must update a file with the exact name of its target.

Your rules should always build $@ as that always has the path to the target that make believes that you should be building.