I would like to estimate the amount of opcodes it takes a ARM cortex A9 single core to handle an IRQ.
Assuming I work with Linux kernel
Whilst you can calculate the theoretical minimum number of core cycles by inspection of the source code, the number actually taken is far less certain due to the effects of caching, memory and memory controller performance, what the other core is doing at the time and various other factors dependant on the micro-architecture of the ARM processor in question.
I suspect you would be better off measuring the actual interrupt latency performance of your system, either using a digital 'scope or performance counters.
Of course, for hard real-time applications, you need to know the worst case interrupt latency - which includes the worst case of all of these factors.