I\'m trying to parameterize my makefile targets. Currently, it has a
TARGET = main
declaration near the top. It derives the SRC
I would suggest simply spelling out your targets as separate targets in the makefile:
all: target1 target2
OTHER_OBJS = misca.o miscb.o miscc.o
target1: target1.o $(OTHER_OBJS)
target2: target2.o $(OTHER_OBJS)
Then make
, make target1
, make target2
, and so on will all do what you want.
You say your makefile "derives the SRC
list from [$(TARGET)
]" in some presumably high-tech way, but it might be interesting to try explicitly listing the object files in a low-tech way instead, as above. Using different make targets is arguably Make's general pattern for producing different results.