While using GNU-make, my Makefile has some pattern rule as:
%.o:%.c
gcc $< -o:$@
This rule is added by me.
But when I do mak
Make only uses a pattern rule as a sort of fallback. For example:
$ ls
Makefile
$ cat Makefile
%.o: %.c
gcc $< -o $@
$ make
make: *** No targets. Stop.
This is fine. Make does not consider the pattern rule as you have not asked it to make anything, and there is no default target in the makefile. Let's ask it to make something that might use the pattern rule.
$ make 1.o
make: *** No rule to make target `1.o'. Stop.
Expected. 1.c
does not exist, so the pattern rule is not considered. Let's try again.
$ touch 1.c
$ make 1.o
gcc 1.c -o 1.o
(and then some error about main being missing).
Personally I dislike these fallback rules intensely. I much prefer listing the targets explicitly. Something like
file.o file2.o f.o: %.o: %.c
...
gives you a Target Specific Pattern Rule. These are quite different (see the manual). [Oh, and the pattern gives you no advantage in this noddy example.]