Do we need mfence when using xchg

Question

I have a set and test xchg based assembly lock. my question is :

Do we need to use memory fencing (mfence, sfence or lf

Answer 1

According to Chapter 8 Bus Locking, of the Intel 64 and IA-32 Architectures Software Developer’s Manual, Volume 3A

The memory-ordering model prevents loads and stores from being reordered with locked instructions that execute earlier or later.

So the locked XCHG instruction acts as a memory barrier, and no additional barrier is needed.