How to catch data-alignment faults on x86 (aka SIGBUS on Sparc)

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耶瑟儿~
耶瑟儿~ 2020-12-25 15:30

Is it somehow possible to catch data-alignment faults even on i386? Maybe by setting a i386 specific machine register or something like that.

On Solaris-Sparc I am r

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  •  爱一瞬间的悲伤
    2020-12-25 15:59

    Meanwhile I found an Intel CPU document addressing this topic.

    See Intel® 64 and IA-32 Architectures Software Developer’s Manual.

    It seems to be difficult to put all this stuff together. However it doesn't sound like it is completely impossible. The interesting chapter is 4.10.5 Checking Alignment

    EDIT (some condensed material from the mentioned document):

    page 5-60

    Interrupt 17 Alignment Check Exception (#AC)
    
    to enable alignment checking, the following conditions must be true:
    
    AM flag is set(bit 18 of control regisster CR0)
    AC flag is set (bit 18 of the EFLAGS)
    The CPL is 3 (protected mode or virtual-8086 mode).
    

    additionally - in 14.8.2.6 - Memory Controller Errors are mentioned. I don't know if it is the same only in other words:

    table 14-11, Encoding of MMM and CCCC Sub-Fields
    Address/Command Error  AC  011
    

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