What is the Cost of an L1 Cache Miss?

Question

Edit: For reference purposes (if anyone stumbles across this question), Igor Ostrovsky wrote a great post about cache misses. It discusses several differen

Answer 1

Some numbers for a 3.4GHz P4 from a Lavalys Everest run:

• the L1 dcache is 8K (cacheline 64 bytes)
• L2 is 512K
• L1 fetch latency is 2 cycles
• L2 fetch latency is about double what you are seeing: 20 cycles

More here: http://www.freeweb.hu/instlatx64/GenuineIntel0000F25_P4_Gallatin_MemLatX86.txt

(for the latencies look at the bottom of the page)