ARM: Is “STMDB SP!, {R0-R8}” (aka PUSH {R0-R8}) an atomic operation?

Question

I wonder if STMDB SP!, {R0-R8} is an atomic operation in ARM(v7), because it looks quite complex to me. So is it for example possible, that the CPU is interrupted somewhere

Answer 1

If configured, it can be interrupted then restarted (not continued). It can also be aborted if the memory is inaccessable.

It is not atomic with respect to other devices.