Why do SSE instructions preserve the upper 128-bit of the YMM registers?

Question

It seems to be a recurring problem that many Intel processors (up until Skylake, unless I\'m wrong) exhibit poor performance when mixing AVX-256 instructions with SSE instru

Answer 1

Background: the decision was made early to make KeSaveFloatingPointState do nothing on Windows x64 and to allow XMM registers to be used without extra save/restore calls even in drivers. Obviously these drivers would not be aware of AVX or the YMM registers.