During reading of an Intel manual book I came across the following:
On processors that support Intel 64 architecture, the
IA32_SYSENTER_ESP
This answer less detailed then previous ones but IMHO easier to understand:
While 64-bit processors have 64-bit wide registers, systems generally do not implement all 64-bits for addressing (16 exabytes of theoretical physical memory).
Thus most architectures define an unimplemented region of the address space which the processor will consider invalid for use. x86-64 (...) define the most-significant valid bit of an address, which must then be sign-extended (...) to create a valid address. The result of this is that the total address space is effectively divided into two parts, an upper and a lower portion, with the addresses in-between considered invalid. (...) Valid addresses are termed canonical addresses (invalid addresses being non-canonical).
From https://www.bottomupcs.com/virtual_memory_is.xhtml
Sign-extended is same bit most significant bit copied to the upper bits address. Upper is 11111... lower 00000....