How to convert 8 bits to 16 bits in VHDL?

后端 未结 5 518
南笙
南笙 2020-12-17 14:29

I have an input signal from ADC convertor that is 8 bits (std_logic_vector(7 downto 0)). I have to convert them to a 16 bits signal (std_logic_vector(15 d

5条回答
  •  轻奢々
    轻奢々 (楼主)
    2020-12-17 15:10

    With the newly released VHDL-2019 standard you can do

    larger_vec <= extend(shorter_vec);
    

    where extend is a function defined as follows

    function extend(vec : std_logic_vector) return target_vec of std_logic_vector is
      variable result : std_logic_vector(target_vec'length - 1 downto 0) := (others => '0');
    begin
      assert vec'length <= target_vec'length report "Cannot extend to shorter vector";
      result(vec'length - 1 downto 0) := vec;
      return result;
    end function;
    

    Tool support is still a bit limited but at least one simulator supports this (Riviera-PRO).

提交回复
热议问题