Why would a region of memory be marked non-cached?

Question

In an embedded application, we have a table describing the various address ranges that are valid on out target board. This table is used to setup the MMU.
The RAM addres

Answer 1

Modern controllers can use L2 cache for DMA, meaning they preserve the coherency of the cached memory region used for DMA accesses. This is also termed as "snoop-able memory transactions" performed by the controller (via DMA).