How to define C++ preprocessor variable in Makefile

Question

I have a C++ preprocessor written like this:

  #ifdef cpp_variable
   //x+y;
  #endif

Can anyone tell me how to define this in Makefile.

Answer 1

Take a variable in Makefile and whatever you need to define in it just add -DXXX. Where XXX in you case is cpp_variable.

For example

COMPILE_OPTS = -DXXX

g++ -c $(COMPILE_OPTS) $<