When must a signal be inserted into the sensitivity list of a process

后端 未结 4 1091
没有蜡笔的小新
没有蜡笔的小新 2020-12-13 14:42

I am confused about when a signal declared in an architecture must be inserted into the sensitivity list of a process.

Is there is a general law that can be followe

4条回答
  •  萌比男神i
    2020-12-13 15:03

    Also, the synthesis tools (talking about the Xilinx XST in this case) don't necessarily always respect the process sensitivity list. If you fail to list all the processes whose values are evaluated in the body of the process, the XST will emit a warning saying that it's going to assume that the signals whose values are evaluated are on the sensitivity list. That may lead to differences between behavioral simulations and actual hardware. Keep it in mind.

提交回复
热议问题