I am implementing a configurable DPRAM where RAM DEPTH is the parameter.
How to determine ADDRESS WIDTH from RAM DEPTH?
I know the relation RAM DEPTH = 2 ^ (
While $clog2 is the correct answer, until the tool vendors catch up, you can implement your own clog2 function as a verilog-2001 macro, which will work with all synthesis and simulation tools.
Such as:
`define CLOG2(x) \
(x <= 2) ? 1 : \
(x <= 4) ? 2 : \
(x <= 8) ? 3 : \
(x <= 16) ? 4 : \
(x <= 32) ? 5 : \
(x <= 64) ? 6 : \
..etc, as far as you need to go..
(x <= 4294967296) ? 32 : \
-1
parameter FOO_MAX_VALUE = 42;
parameter FOO_WIDTH = `CLOG2(FOO_MAX_VALUE);
Where the final "-1" is used to produce an illegal value the the simulator should flag.
(late edit: oops, fixed my off-by-one error!)