Real-life use cases of barriers (DSB, DMB, ISB) in ARM

Question

I understand that DSB, DMB, and ISB are barriers for prevent reordering of instructions. I also can find lots of very good explanations for each of them, but it is pretty ha

Answer 1

Usually you need to use a memory barrier in cases where you have to make SURE that memory access occurs in a specific order. This might be required for a number of reasons, usually it's required when two or more processes/threads or a hardware component access the same memory structure, which has to be kept consistent.

It's used very often in DMA-transfers. A simple DMA control structures might look like this:

struct dma_control {
  u32 owner;
  void * data;
  u32 len;
};

The owner will usually be set to something like OWNER_CPU or OWNER_HARDWARE, to indicate who of the two participants is allowed to work with the structure.

Code which changes this will usually like like this

dma->data = data;
dma->len  = length;
smp_mb();
dma->owner = OWNER_HARDWARE;

So, data an len are always set before the ownership gets transfered to the DMA hardware. Otherwise the engine might get stale data, like a pointer or length which was not updated, because the CPU reordered the memory access.

The same goes for processes or threads running on different cores. The could communicate in a similar manner.