Understanding CPU cache and cache line

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礼貌的吻别
礼貌的吻别 2020-12-12 16:34

I am trying to understand how CPU cache is operating. Lets say we have this configuration (as an example).

  • Cache size 1024 bytes
  • Cache line 32 bytes
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  •  一向
    一向 (楼主)
    2020-12-12 16:51

    This is based on my vague memory, you should read books like "Computer Architecture: A Quantitative Approach" by Hennessey and Patterson. Great book.

    Assuming a 32-bit CPU... (otherwise your figures would need to use >4 bytes (maybe <8 bytes since some/most 64-bit CPU don't have all 64 bits of address line used)) for the address.

    1) I believe it's at least 4*32 bytes. Depending on the CPU, the chip architects may have decided to keep track of other info besides the full address. But it's usually not considered part of the cache.

    2) Yes, but how that mapping is done is different. See Wikipedia - CPU cache - associativity There's the simple direct mapped cache and the more complex associative mapped cache. You want to avoid the case where some code needs two piece of information but the two addresses map to the exact same cache line.

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