How does direct mapped cache work?

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逝去的感伤
逝去的感伤 2020-12-12 15:01

I am taking a System Architecture course and I have trouble understanding how a direct mapped cache works.

I have looked in several places and they explain it in a d

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  •  孤城傲影
    2020-12-12 15:31

    A direct mapped cache is like a table that has rows also called cache line and at least 2 columns one for the data and the other one for the tags.

    Here is how it works: A read access to the cache takes the middle part of the address that is called index and use it as the row number. The data and the tag are looked up at the same time. Next, the tag needs to be compared with the upper part of the address to decide if the line is from the same address range in memory and is valid. At the same time, the lower part of the address can be used to select the requested data from cache line (I assume a cache line can hold data for several words).

    I emphasized a little on data access and tag access+compare happens at the same time, because that is key to reduce the latency (purpose of a cache). The data path ram access doesn't need to be two steps.

    The advantage is that a read is basically a simple table lookup and a compare.

    But it is direct mapped that means for every read address there is exactly one place in the cache where this data could be cached. So the disadvantage is that a lot of other addresses would be mapped to the same place and may compete for this cache line.

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