How to wire two modules in Verilog?

Question

I have written two modules DLatch and RSLatch and i want to write verilog code to join those two.

Answer 1

You will need to create an outer module, with the ports as shown in your schematic (D, Clk, Q, NQ). Inside this module you instantiate the two submodules DLatch and RSLatch, and wire the ports appropriately. (You will need to declare extra wires for the internal interconnects.)