Interrupts, Instruction Pointer, and Instruction Queue in 8086

Question

Suppose an external interrupt request is made to 8086. Processor will handle the interrupt after completing the current instruction being executed (if any). Before handling

Answer 1

• When an interrupt or trap occurs, the CPU synchronizes with the cache by stalling until all pending cache operations are either complete or preempted.
• If a cache load was already in progress it completes, but other operations waiting in the queue are preempted.
• The queue is stored as part of the cache internal state so when the context is restored the preempted operations are re-queued.