Order of processing components in makefile

Question

In a makefile, the dependency line is of the form -

abc: x y z

All three of the components (x,y,z) are themselves targets in dependency lin

Answer 1

The POSIX description of make includes a rationale which says:

The make utilities in most historical implementations process the prerequisites of a target in left-to-right order, and the makefile format requires this. It supports the standard idiom used in many makefiles that produce yacc programs; for example:

foo: y.tab.o lex.o main.o
     $(CC) $(CFLAGS) -o $@ t.tab.o lex.o main.o

In this example, if make chose any arbitrary order, the lex.o might not be made with the correct y.tab.h. Although there may be better ways to express this relationship, it is widely used historically. Implementations that desire to update prerequisites in parallel should require an explicit extension to make or the makefile format to accomplish it, as described previously.

(I believe the t.tab.o in the $(CC) line is a typo for y.tab.o, but that is what the rationale actually says.)

Thus, the observed behaviour that pre-requisites are processed from left to right has validation here, though it is only in the Rationale section, not in the main description. The Rationale also mentions issues with parallel make etc.